The all-semiconductor superconducting qubit is a proposed architecture in which every component of a superconducting quantum circuit — Josephson junctions, wires, inductors, capacitors — is fabricated within a single group-IV semiconductor crystal (Si or Ge) using precision atomic-scale doping. The heavily doped regions become superconducting below ~1 K, and the undoped crystal between them forms the tunnel barrier. No deposited metal is involved: superconductivity is intrinsic to the doped semiconductor.
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Description
Conventional superconducting qubits use deposited metal films (Al, Nb, Ta) on a semiconductor or sapphire substrate. Even “hybrid” super-semi devices like the gatemon deposit a metal superconductor onto a semiconductor nanowire or 2DEG. The all-semiconductor approach eliminates the metal entirely:
- Superconducting regions: Created by dense substitutional doping (e.g., boron in Si at densities >10²¹ cm⁻³), which induces superconductivity via the BCS mechanism with – K.
- Josephson junctions: Formed at the boundary between a doped (superconducting) region and an undoped (insulating) region — a doped-undoped-doped structure within the same crystal. The undoped region is the tunnel barrier.
- Wires and interconnects: Heavily doped superconducting channels patterned by STM hydrogen lithography or focused ion beam implantation.
- Capacitors: Doped plates separated by undoped semiconductor dielectric — all within one crystal.
The critical advantage is the elimination of all metal-semiconductor interfaces, metal-substrate interfaces, and amorphous oxide barriers — the dominant sources of decoherence in conventional superconducting qubits. The entire device is a defect-free single crystal, with loss determined by the intrinsic quality of the crystalline semiconductor.
Fabrication pathway
Atomic-precision placement of dopants using scanning tunneling microscope (STM) hydrogen desorption lithography enables deterministic positioning of individual dopant atoms. This technique, developed for silicon donor qubits (Kane qubit), can be repurposed to create superconducting circuits with atomic-scale control of junction dimensions and barrier thickness.
Hamiltonian
The circuit Hamiltonian follows standard superconducting qubit forms (transmon, fluxonium, etc.) depending on the specific circuit design. The distinction is in the materials parameters:
with determined by the doped-undoped-doped junction geometry, and from the crystalline capacitor. The BCS gap – meV (smaller than Al’s 0.18 meV gap at bulk) sets the operating temperature floor.
Performance Metrics
| Metric | Value | Notes | Fidelity reference |
|---|---|---|---|
| Predicted | 0.3–0.9 K | Boron-doped Si at >10²¹ cm⁻³ | shim-2014-bottom-up-sc |
| BCS gap | 0.1–0.3 meV | Smaller than Al (0.18 meV) | shim-2014-bottom-up-sc |
| Junction | ~0.1–0.5 mV | Estimated from doping profiles | shim-2014-bottom-up-sc |
| Experimental status | Not yet realized | Doped Si superconductivity confirmed; full qubit pending | — |
| Fabrication method | STM H-lithography | Atomic-precision dopant placement | — |
Scaling Considerations
- Interface-free: Eliminates all lossy interfaces (metal-substrate, metal-air, amorphous oxide) — potentially a step change in coherence.
- CMOS-native: Built entirely within silicon/germanium — ultimate compatibility with semiconductor foundry processes.
- Qubit-spin integration: A Si crystal can host both superconducting circuits (doped regions) and spin qubits (donor atoms) in the same chip — true monolithic quantum processor.
- Operating temperature: Low requires dilution refrigerator operation well below 100 mK, similar to conventional SC qubits.
- Fabrication maturity: STM lithography is slow and serial; scaling to foundry-level throughput is a major open challenge.