Description
The 0-π qubit is a superconducting protected-qubit design (Brooks, Kitaev, Preskill, 2013) that aims to suppress both bit-flip and phase-flip errors at the hardware level using a circuit with two nearly degenerate minima (near phase 0 and π) and strongly biased noise channels.
The circuit combines large inductive and capacitive elements with Josephson junctions to produce a potential landscape where logical states have exponentially small overlap. In the ideal parameter regime, local noise operators have exponentially weak matrix elements between logical states.
Figure

Hamiltonian
A reduced 0-π model can be written in collective coordinates as:
with design target and anisotropic capacitances producing disjoint-support wavefunctions in .
Why it matters
0-π is one of the clearest “hardware-protected” superconducting qubit proposals: it targets passive suppression of dominant error channels before full QEC overhead.
Key Metrics
| Metric | Value | Notes | Fidelity reference |
|---|---|---|---|
| Protection mechanism | Exponential wavefunction separation | In ideal parameter regime | Brooks 2013 |
| Dominant challenge | Disorder / parameter spread | Breaks ideal protection symmetry | — |
| Experimental status | Early prototypes / partial regimes | Not yet transmon-level maturity | — |
| Operating temperature | 10–20 mK | Dilution refrigerator | — |