Hardware-integrated real-time surface-code decoding and feedback on a superconducting quantum processor. Zoo entry: classical-control.

Abstract

Quantum error correction requires classical decoding and feedback to keep pace with the hardware cycle. Yang et al. integrated an FPGA neural-network decoder with a superconducting processor and experimentally demonstrated real-time distance-3 surface-code correction. The system achieved a deterministic 550 ns closed-loop latency, including 124 ns for decoding, within a 1.25 s QEC cycle. Real-time correction matched offline-decoding performance and also supported feedback in non-Clifford logical circuits.

Key Findings

  • Demonstrated real-time distance-3 surface-code error correction on a superconducting quantum processor.
  • Closed the full measurement-to-feedback loop in 550 ns, including 124 ns of FPGA neural-network decoding.
  • Applied feedback within a 1.25 s QEC cycle and demonstrated mid-circuit correction in non-Clifford logical circuits.

Verification Report

Author order was checked against the paper PDF title page on 2026-09-18. The arXiv abstract and link were also verified.